symbol v ds v gs i dm i ar e ar t j , t stg symbol typ max 16.7 25 40 50 r jc 2.5 3 maximum junction-to-case b steady-state c/w thermal characteristics parameter units maximum junction-to-ambient a t 10s r ja c/w maximum junction-to-ambient a steady-state c/w w t a =70c 1.6 junction and storage temperature range -55 to 175 power dissipation a t a =25c p dsm 2.5 a repetitive avalanche energy l=0.1mh c mj power dissipation b t c =25c p d w t c =100c avalanche current c continuous drain current g maximum units parameter t c =25c t c =100c absolute maximum ratings t a =25c unless otherwise noted i d gate-source voltage drain-source voltage -60 pulsed drain current c -12 -10 -30 c v v 20 25 a -12 23 50 AOD407 p-channel enhancement mode field effect transistor features v ds (v) = -60v i d = -12a (v gs = -10v) r ds(on) < 115m ? (v gs = -10v) r ds(on) < 150m ? (v gs = -4.5v) general description the AOD407 uses advanced trench technology to provide excellent r ds(on) , low gate charge and low gate resistance. with the excellent thermal resistance of the dpak package, this device is well suited for high current load applications. standard product a od407 is pb-free (meets rohs & sony 259 specifications). AOD407l is a green product ordering option. AOD407 and AOD407l are electrically identical. g d s t o-252 d-pak t op view drain connected to t ab g d s alpha & omega semiconductor, ltd.
AOD407 symbol min typ max units bv dss -60 v -0.003 -1 t j =55c -5 i gss 100 na v gs(th) -1.5 -2.1 -3 v i d(on) -30 a 91 115 t j =125c 150 114 150 m : g fs 12.8 s v sd -0.76 -1 v i s -12 a c iss 987 1185 pf c oss 114 pf c rss 46 pf r g 710 : q g (10v) 15.8 20 nc q g (4.5v) 7.4 9 nc q gs 3nc q gd 3.5 nc t d(on) 9ns t r 10 ns t d(off) 25 ns t f 11 ns t rr 27.5 35 ns q rr 30 nc this product has been designed and qualified for the consumer market. applications or uses as critical components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters v gs =0v, v ds =-30v, f=1mhz gate drain charge total gate charge (10v) v gs =-10v, v ds =-30v, i d =-12a turn-on rise time turn-off delaytime v gs =-10v, v ds =-30v, r l =2.5 : , r gen =3 : gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time switching parameters total gate charge (4.5v) gate source charge m : v gs =-4.5v, i d =-8a i s =-1a,v gs =0v v ds =-5v, i d =-12a r ds(on) static drain-source on-resistance forward transconductance diode forward voltage i dss p a gate threshold voltage v ds =v gs i d =-250 p a v ds =-48v, v gs =0v v ds =0v, v gs =20v zero gate voltage drain current gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions body diode reverse recovery time body diode reverse recovery charge i f =-12a, di/dt=100a/ p s drain-source breakdown voltage on state drain current i d =-250 p a, v gs =0v v gs =-10v, v ds =-5v v gs =-10v, i d =-12a reverse transfer capacitance i f =-12a, di/dt=100a/ p s a: the value of r qja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the power dissipation pdsm is based on r qja and the maximum allowed junction temperature of 150c. the value in any given application depends on the user's specific board design, and the maximum temperature of 175c may be used if the pcb allows it. b. the power dissipation pd is based on tj(max)=175c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. c: repetitive rating, pulse width limited by junction temperature tj(max)=175c. d. the r qja is the sum of the thermal impedence from junction to case r qjc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 ms pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsi nk, assuming a maximum junction temperature of tj(max)=175c. g. the maximum current rating is limited by bond-wires. h. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with ta =25c. the soa curve provides a single pulse rating. rev 5 : june 2005 alpha & omega semiconductor, ltd.
AOD407 typical electrical and thermal characteristic s 0 2 4 6 8 10 012345 -v gs (volts) figure 2: transfer characteristics -i d (a) 80 100 120 140 160 180 200 220 0 5 10 15 20 25 -i d (a) figure 3: on-resistance vs. drain current and gate voltage r ds(on) (m ? ) 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -v sd (volts) figure 6: body-diode characteristics -i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature normalized on-resistance v gs =-4.5v i d =-8a v gs =-10v i d =-12a 50 100 150 200 250 300 246810 -v gs (volts) figure 5: on-resistance vs. gate-source voltage r ds(on) (m ? ) 25c 125c v ds =-5v v gs =-4.5v v gs =-10v i d =-12a 25c 125c 0 5 10 15 20 25 30 012345 -v ds (volts) fig 1: on-region characteristics -i d (a) v gs =-4v -3.5v -6v -7v -10v -4.5v -5v -3v alpha & omega semiconductor, ltd.
AOD407 typical electrical and thermal characteristic s 0 2 4 6 8 10 0481216 -q g (nc) figure 7: gate-charge characteristics -v gs (volts) 0 200 400 600 800 1000 1200 0 5 10 15 20 25 30 -v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 pulse width (s) figure 11: normalized maximum transient thermal impedance (note f) z jc normalized transient thermal resistance c oss c rs s 0.1 1.0 10.0 100.0 0.1 1 10 100 -v ds (volts) -i d (amps) figure 9: maximum forward biased safe operating area (note f) 100 s 10ms 1ms dc r ds(on) limited t j(max) =175c, t a =25c v ds =-30v i d =-12a a single pulse d=t on /t t j,pk =t c +p dm .z jc .r jc r jc =3c/w t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =175c t a =25c 10 alpha & omega semiconductor, ltd.
AOD407 typical electrical and thermal characteristic s 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 16: normalized maximum transient thermal impedance (note h) z ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z ja .r ja r ja =50c/w t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 6 8 10 12 14 0.00001 0.0001 0.001 time in avalanche, t a (s) figure 12: single pulse avalanche capability -i d (a), peak avalanche current 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 t case (c) figure 13: power de-rating (note b) power dissipation (w) 0 2 4 6 8 10 12 14 0 25 50 75 100 125 150 175 t case (c) figure 14: current de-rating (note b) current rating -i d (a) dd d a v bv i l t ? ? = t a =25c 0 10 20 30 40 50 60 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) power (w) t a =25c alpha & omega semiconductor, ltd.
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